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HIGH-SPEED VLSI ROUTER ARCHITECTURE WITH INTELLIGENT BUFFERING FOR NOC EFFICIENCY

G. LAVANYA, P. SURYA, CH.ANITHA, A. NAGA RAJITHA, P. SARANYA

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ID: 2051

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Abstract :

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Published:

21-2-2026

Issue:

Vol. 26 No. 2 (2026)

Page Nos:

114-120

Section:

Articles

License:

This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.

How to Cite

G. LAVANYA, P. SURYA, CH.ANITHA, A. NAGA RAJITHA, P. SARANYA, HIGH-SPEED VLSI ROUTER ARCHITECTURE WITH INTELLIGENT BUFFERING FOR NOC EFFICIENCY , 2026, International Journal of Engineering Sciences and Advanced Technology, 26(2), Page 114-120, ISSN No: 2250-3676.

DOI:

ISSN No:2250-3676 ----- Crossref DOI Prefix: 10.64771 ----- Impact Factor: 9.625