Abstract :

The Portable Nature Of Handheld Devices Has Become A Common Thing In The Contemporary Electronic World, Creating A Need To Create Energy Efficient Components. The Design Of Low Power Very Large Scale Integration (VLSI) Is Critical In The Improvement Of Battery Life, Minimization Of Heat Generated And General Improvement In The Performance Of A Device. In This Paper, The Author Will Discuss The Major Issues, Design Styles And Architecture Of Low Power VLSI Design, Specifically Design Targeting Portable Systems. An End-to-end Systemlevel Methodology Which Incorporates Transistor-level And Architectural Techniques Is Suggested. Simulation Results Of Low Power And Conventional Designs Are Also Compared In The Paper To Outline Performance Tradeoffs And Energy Efficiency Enhancement. Keywords— Low Power, VLSI, Portable Devices, Power Optimization, CMOS, Leakage Reduction, Dynamic Power, Energy-Efficient Circuits

Published:

25-9-2025

Issue:

Vol. 25 No. 9 (2025)

Page Nos:

517-524

Section:

Articles

License:

This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.

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